1. Field
Exemplary embodiments of the present invention relate to a non-volatile memory and a semiconductor device including the same.
2. Description of the Related Art
FIG. 1 illustrates a conventional memory device for describing a repair operation.
Referring to FIG. 1, the memory device includes a memory array 110, a row circuit 120, and a column circuit 130. The memory array 110 includes a plurality of memory cells to store data. The row circuit 120 is configured to activate a word line selected by a row address R_ADD. The column circuit 130 is configured to access a bit line selected by a column address to read or write the data.
A row fuse circuit 140 is configured to store a row address, corresponding to a defective memory cell within the memory array 110, as a repair row address REPAIR_R_ADD. The row comparator 150 is configured to compare the repair row address REPAIR_R_ADD stored in the row fuse circuit 140 to a row address R_ADD inputted from outside the memory device. When the repair row address REPAIR_R_ADD coincides with the row address R_ADD, the row comparator 150 controls the row circuit 120 to activate a redundancy word line in place of a word line designated by the row address R_ADD. That is, a row (word line) corresponding to the repair row address REPAIR_R_ADD stored in the row fuse circuit 140 is replaced with a redundancy row (word line).
In FIG. 1, ACT represents a signal indicating that an active command for activating a word line is enabled, PRE represents a precharge command, RD represents a read command, and a WT represents a write command.
Conventionally, a laser fuse has been used as the fuse circuit 140. The laser fuse stores high or low data depending on whether the fuse is cut or not. The laser fuse may be programmed in a wafer state of a memory device, but may not be programmed after a wafer is mounted in a package. Furthermore, it may be difficult to design the laser fuse in a small size, due to the limit in reducing pitch.
To overcome such disadvantages, U.S. Pat. Nos. 6,904,751, 6,777,757, 6,667,902, 7,173,851, and 7,269,047 have been disclosed. According to the disclosures, one of nonvolatile memories such as E-fuse array, NAND (Not And) flash memory, NOR (Not Or) flash memory, MRAM (Magnetic Random Access Memory), STT-MRAM (Spin Transfer magnetic Random Access Memory), ReRAM (Resistive Random Access Memory) and PC RAM (Phase Change Random Access Memory) is included in a memory device, and repair information (repair address) is stored in the nonvolatile memory and then used.
FIG. 2 illustrates the memory device including a nonvolatile memory to store repair information.
Referring to FIG. 2, it can be seen that the fuse circuit 140 is removed from the memory device of FIG. 1 and a nonvolatile memory 210 and a register 220 are added to the memory device.
The nonvolatile memory 210 replaces the fuse circuit 140. The nonvolatile memory 210 stores a row address, corresponding to a defective memory cell within the memory array 110, as a repair row address. The nonvolatile memory 210 may include any one of nonvolatile memories such as E-fuse array, NAND flash memory, NOR flash memory, MRAM (Magnetic Random Access Memory), STT-MRAM (Spin Transfer magnetic Random Access Memory), ReRAM (Resistive Random Access Memory), and PC RAM (Phase Change Random Access Memory).
The register 220 is suitable for receiving repair information (that is, the repair row address) stored in the nonvolatile memory 210 and storing the received repair information subsequently the repair information stored in the register 220 is used for a repair operation. The register 220 includes latch circuits, and may store repair information only while power is supplied. An operation of transmitting repair information from the nonvolatile memory 210 to the register 220 and storing the repair information therein is referred to as a boot-up operation.
The reason that the repair information stored in the nonvolatile memory 210 is not directly used but transferred to the register 220, stored and used is as follows. Since the nonvolatile memory 210 is formed in an array shape, a predetermined time is required to call data stored in the nonvolatile memory 210. Since data may not be immediately called, the data stored in the nonvolatile memory 210 may not be directly used to perform a repair operation. Thus, the boot-up operation of transferring the repair information stored in the nonvolatile memory 210 to the register 220 to store the repair information is performed, and the data stored in the register 220 is then used to perform a repair operation.
When the fuse circuit 140 implemented with a laser fuse is replaced with the nonvolatile memory 210 and the register 220, an additional defect caused and discovered after a wafer state may be repaired. Research is being conducted on technology for accessing the nonvolatile memory in the memory device even after the memory device is fabricated (for example, after a product is sold) and repairing a defect caused after the memory device is fabricated.